SGM2054.pdf
No.10799
? Input Voltage: Supports 2.5V Rail and 3.3V Rail
? VLDOIN Voltage Range: 1.1V to 3.5V
? Requires Minimum Output Capacitance of 20μF
(Typically 3 × 10μF MLCCs) for Memory Termination
Applications (DDR)
? PGOOD to Monitor Output Regulation
? EN Input
? REFIN Input Allows for Flexible Input Tracking either
Directly or through Resistor Divider
? Remote Sensing (VOSNS)
? ±10mA Buffered Reference (REFOUT)
? Built-in Soft-Start, UVLO and OCL
? Thermal Shutdown
? Supports DDR2, DDR3, DDR3L, Low-Power DDR3,
DDR4 and DDR5 VTT Applications
? -40℃ to +125℃ Operating Temperature Range
? Available in a Green TDFN-3×3-10L Package
The SGM2054 device is a sink and source double data rate (DDR) termination regulator. It is specifically designed for low-cost and low-external component count systems.
The SGM2054 provides fast transient response and only requires a minimum 20μF output capacitance. The SGM2054 supports remote sensing functions and all features required to power the DDR2, DDR3, DDR3L, Low-Power DDR3, DDR4 and DDR5 VTT bus termination. In addition, the SGM2054 provides an open-drain PGOOD to monitor the output regulation. EN signal that can be used to discharge VO when EN less than 0.3V.
The SGM2054 is available in a Green TDFN-3×3-10L package. It operates over an operating temperature range of -40℃ to +125℃.
